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PART NUMBER:
± 2g / 4g / 8g Tri-axis Digital
Accelerometer Specifications
KXTF9-4100
Rev. 6
Jun-2011
INT_REL
Latched interrupt source information (INT_SRC_REG1 and INT_SRC_REG2), the status register, and
the physical interrupt pin (7) are cleared when reading this register.
R
X
Bit7
R
X
Bit6
R
X
Bit5
R
X
Bit4
R
X
Bit3
R
X
Bit2
R
X
Bit1
R
X
Bit0
I C Address: 0x1Ah
2
CTRL_REG1
Read/write control register that controls the main feature set.
R/W
PC1
Bit7
R/W
RES
Bit6
R/W
DRDYE
Bit5
R/W
GSEL1
Bit4
R/W
GSEL0
Bit3
R/W
TDTE
Bit2
R/W
WUFE
Bit1
R/W
TPE
Bit0
Reset Value
00000000
I C Address: 0x1Bh
2
PC1 controls the operating mode of the KXTF9.
PC1 = 0 - stand-by mode
PC1 = 1 – operating mode
RES determines the performance mode of the KXTF9. Note that to change the value of this
bit, the PC1 bit must first be set to “0”.
RES = 0 – low current, 8-bit valid
RES = 1- high current, 12-bit valid
DRDYE enables the reporting of the availability of new acceleration data on the interrupt.
Note that to change the value of this bit, the PC1 bit must first be set to “0”.
DRDYE = 0 – availability of new acceleration data not reflected on interrupt pin (7)
DRDYE = 1- availability of new acceleration data reflected on interrupt pin (7)
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